Please use this identifier to cite or link to this item:https://hdl.handle.net/20.500.12259/48265
Type of publication: Straipsnis konferencijos medžiagoje kitose duomenų bazėse / Article in conference proceedings in other databases (P1c)
Field of Science: Informatika / Informatics (N009)
Author(s): Karmani, Mouna;Krilavičius, Tomas;Khedhiri, Chiraz;Hamdi, Belgacem;Man, Ka Lok;Rahmani, Amir-Mohammad
Title: A Self-test and self-repair approach for analog integrated circuits
Is part of: 2nd Baltic congress on future internet communications, 25-27 April 2012, Vilnius, Lithuania. Piscataway, NJ : IEEE Press, 2012
Extent: p. 1-4
Date: 2012
Keywords: Analoginės integruotos schemos;Savęs testavimas;Savęs pasitaisymas;Integruoti sensoriai;Analog ICs;Self-test;Self-repair;Built-In Current Sensor (BICS);Bridging faults;65 nm CMOS technology
ISBN: 9781467316705
Abstract: With the continuous increase of integration densities and complexities, secure integrated circuits (ICs) are more and more required to guarantee reliability for safety-critical applications in the presence of soft and hard faults. Thus, testing has become a real challenge for enhancing the reliability of safety-critical systems. This paper presents a Self-Test and Self- Repair approach which can be used to tolerate the most likely defects of bridging type that create a resistive path between VDD supply voltage and the ground occurring in analog CMOS circuits during the manufacturing process. The proposed testing approach is designed using the 65 nm CMOS technology. We then used an operational amplifier (OPA) to validate the technique and correlate it with post layout simulation results
Internet: https://hdl.handle.net/20.500.12259/48265
Affiliation(s): Informatikos fakultetas
Taikomosios informatikos katedra
Vytauto Didžiojo universitetas
Appears in Collections:Universiteto mokslo publikacijos / University Research Publications

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