Please use this identifier to cite or link to this item:https://hdl.handle.net/20.500.12259/43304
Type of publication: Straipsnis konferencijos medžiagoje kitose duomenų bazėse / Article in conference proceedings in other databases (P1c)
Field of Science: Informatika / Informatics (N009)
Author(s): Man, Ka Lok;Zhang, Nan;Lei, Chi-Un;Lim, Eng Gee;Ting, T. O;Wan, Kaiyu;Ma, Jieming;Krilavičius, Tomas;Liu, Dawei;Guo, Yu
Title: Specification and analysis of null convention logic (NCL) circuits using PAFSV
Is part of: IMECS 2014 : Engineers and computer scientists: proceedings of the international multiconference, 2014, March 12-14, Hong Kong. Vol. 2. Hong Kong : Newswood Limited, 2014
Extent: p. 860-865
Date: 2014
Series/Report no.: (Lecture notes in engineering and computer science, 2078-0958)
Note: ISSN: 2078-0958 (Print) / ISSN: 2078-0966 (Online)
Keywords: Index Terms;SystemVerilog;Formal semantics;Formal language;Null Convention Logic;(NCL)
ISBN: 9789881925336
Abstract: In this work, a process algebraic framework known as PAFSV is applied to the formal specication and analysis of IEEE 1800TM SystemVerilog design. The formal semantics of PAFSV is defined by means of deduction rules that associate a time transition system with a PAFSV process. In addition, a set of properties of PAFSV is defined for a notion of bisimilarity; and PAFSV may be regarded as the formal language of a significant subset of IEEE 1800TM SystemVerilog. The main aim of this paper is to demonstrate that PAFSV is effective and useful for the formal specification and analysis of IEEE 1800TM SystemVerilog design. To achieve the aim of this approach, we apply PAFSV to model and analyse classical circuits such as the Null Convention Logic (NCL) circuit
Internet: http://www.iaeng.org/publication/IMECS2014/IMECS2014_pp860-865.pdf
Affiliation(s): Informatikos fakultetas
Taikomosios informatikos katedra
Vytauto Didžiojo universitetas
Appears in Collections:Universiteto mokslo publikacijos / University Research Publications

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